Phase-locked loops (PLLs) may be used in a variety of different systems including communication and multimedia systems. PLLs may be used for frequency synthesis, deskewing, clock generation, clock distribution, clock recovery, and other signal processing, timing and/or synchronization purposes.
A PLL may operate as a feedback control system that generates an output signal based on an input signal such that a substantially constant phase delay is maintained between the input and output signals for a given frequency. Designing PLL control loops that can operate at high-speeds may present significant design challenges, particularly in low-voltage applications.